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pMTJ STT-MRAM based Chiplets for Neuromorphic Computing

Completed TRL 4 (started at 1, targeting 4)

Description

Avalanche Technology will offer MRAM chiplets based on its pMTJ STT-MRAM technology. Avalanche’s MRAM chiplets use Generic MRAM Interface (GMI). The GMI is modeled on the widely-used HBM interface and is optimized for memory accesses. In addition to the memory interface, MRAM chiplets need a second interface to communicate with the rest of the chiplets in a multi-chiplet system. For example, Intel’s Advanced Interface Bus (AIB) protocol is in the forefront for direct chiplet-to-chiplet communication for DARPA’s CHIPS (Common Heterogeneous Integration and Intellectual Property (IP) Reuse Strategies) program. To be used in AIB-based systems, Avalanche’s MRAM chiplet will have an AIB interface and an adapter from the AIB to the HBM interface for the MRAM array.

Benefits

Demonstration of Compute in memory (CIM) for Neuromorphic applications utilizing proven Radiation Hardened STT-MRAM products from Avalanche Technology for Harsh environments.

Deep learning and Artificial Intelligence in a wide variety of tasks such as computer vision, image and speech recognition, machine translation, robotics and medical image processing.

Details

Technology areaRobotic Systems > Robotics Integration > Modularity, Commonality, and Interfaces
ProgramSmall Business Innovation Research/Small Business Tech Transfer (SBIR/STTR)
Lead organizationAvalanche Technology
Start date2019-08-19
End date2020-02-18

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