Driver ASICs for Advanced Deformable Mirrors

This SBIR/STTR Civilian Commercialization Readiness Pilot Program (CCRPP) project aims to continue development of the Phase II driver ASIC technology. A number of constraints have been imposed on key parameters of the Phase II driver ASIC, and these specifications are crucial for a driver ASIC to meet the needs of the targeted space applications. The Phase II effort has elevated the driver ASIC technology to TRL 4 by characterizing the ASIC performance on a low fidelity breadboard. Through this CCRPP effort, we propose to address the integration and scaling issue of the driver ASIC in order to create a medium fidelity functional unit for DM integration.A primary customer that is to receive the new capability as a result of this CCRPP project is an NASA APRA (Astrophysics Research and Analysis) project aiming to integrate the driver ASIC with DMs. A second customer that this CCRPP project expects to serve is a pending NASA project with a goal to carry on environmental testing and performance optimization of the driver ASIC in order to make it suitable for space-based deployment including being able to withstand the extreme radiation and temperature levels of the space environment.When fully realized, the driver ASIC is ideally suited for integration to DMs on NASA’s space-based missions for exoplanets exploration. The ASIC have low mass, volume and power, all things that offer substantial advantages to a space mission in comparison with the thousands of wires that connect the modern DMs. In addition, only a few wires will connect it to the control computer greatly simplifying integration, reducing costs and increasing reliability. In future developments, it can be applied to other different DM formats while improving reliability. Larger array format up to 128x128 driver ASICs are necessary for future integration with Exoplanet Exploration Program. This CCRP effort will aid to fill the technology gaps listed in the Exoplanet Exploration Program Technology Plan 2017.

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