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Completed TRL 3 (started at 3, targeting 4)
Design and build a board with configurable FPGA and low power soft core processor (ARM Cortex M1) Test out design with hardware in the loop (HWIL) testing on attitude control system (ACS) components with a variety of interface protocols and a simple ACS algorithm Have radiation effects group look at various components of design and give input
Listed on TechPort itself — the most direct way to ask about this specific project.
This is early/mid-stage (TRL 3) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.
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