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20 GSPS ADC For Spectrometer Backends In Microwave Radiometers
Completed
TRL 5 (started at 3, targeting 5)
Description
This SBIR Phase II proposal requests support for Alphacore, Inc. to design and characterize a 20GS/s (giga-samples per-second), 6-bit, low-power, and low-cost analog-to-digital converter (ADC) ASIC with backend polyphase filter banks (PFB) based digital processing (DSP) for use in a wide range of NASAs microwave sensor based remote sensing applications. Alphacores newsingle-core ADCdesigned in the GlobalFoundries 22FDX22nm FDSOIprocessallows full Nyquist rate conversion of input signals up to 20 GHz. The maximum sampling rate is 24 GS/s, resolution is 6bits (effective number of bits, ENOB = 4.5 bits) and the power consumption is below250mW (115mW core ADC + 134mW output interface) without counting the on-chip DSP. This is possible because of Alphacores innovative digital folding Flash ADCarchitecture. The low power supplyvalue of0.8Vavailableinthe 22FDXprocess also helps in keeping the power consumptionat a lower levelthan what is possible in most comparable CMOS processes. The ADC will have an analog input bandwidth of 20GHz making it possible to sample and convert signals on the full second Nyquist band, which provides significant benefits to many applications. Alphacore will also make the ADC radiation-tolerant, whichenables its usein space-borne applications. Alphacores ADC provides unprecedented performance in terms of bandwidth and resolution at low power levels, in addition to radiation hardness, which opens possibilities for new and improved instruments and missions. Having such an ADC and other critical designs already available gives Alphacore a crucial advantage in developing a fieldable system by the end of theSBIRdevelopmentcycle. This SBIR Phase II proposal requests support for Alphacore, Inc. to design and characterize a 20GS/s (giga-samples per-second), 6-bit, low-power, and low-cost analog-to-digital converter (ADC) ASIC with backend polyphase filter banks (PFB) based digital processing (DSP) for use in a wide range of NASA’s microwave sensor based remote sensing applications. Key innovation is a unique Single Core Digitizer (SCD), optimized for microwave radiometer applications. We have considered how the ADC will be used in a spectrometer backend system; the analog front-end implements high-speed sampling of wide bandwidth signals with minimal distortion, while the digitizer’s digital back-end implements digital data de-multiplexing and signal conditioning to allow seamless and simple integration with commercially available field programmable gate arrays (FPGA). Alternatively, reduced data rate can be provided using Alphacore’s on-chip DSP. Alphacore’s ADC provides these improvements at lower-power and lower-cost than existing commercial ADCs. In Phase II, the main objectives are: Objective 1: Evaluation of Phase I ADC Objective 2: Development of on-chip DSP (ADC-PFB interface, PFB + FFT + Accumulation and Averaging) Objective 3: FC-BGA Package Development and Completion of final ADC+DSP Integration for final prototype SCD ASIC Objective 4: Evaluate Final Test chip Phase II deliverables are: Kickoff meeting within 30 days of contract start Progress reports as stated in the contract Technical review within six months Final report including detailed simulation/measurement results 10 final prototype packaged ADC chips at the end of Phase 2 5 Evaluation boards at the end of Phase 2
Benefits
This rad-hard ADC is ideal for CubeSats and small/nano satellites. It supports NASA’s remote radiometer microwave sensors for a wide range of Earth observing missions. Examples are potential SMAP follow-on missions and future upgrades to instruments like the AMR-C. Moon to Mars exploration applications are also great matches. Alphacore will bring significant value to NASA’s sensor and advanced RF communications applications. Alphacore’s RH ADC will both enable improved data resolution and also survive in harsh environments. Radio astronomy telescope arrays such as the Square Kilometer Array, LEO and GEO commercial telecommunication satellites, Energy Frontier physics research (including ATLAS and CMS at Large Hadron Collider at CERN), fiber optic communications networking applications (coherent receivers), defense phased array applications and IC test equipment applications, 5G telecoms and Starlink.
Details
| Technology area | Sensors and Instruments |
| Program | Small Business Innovation Research/Small Business Tech Transfer (SBIR/STTR) |
| Lead organization | Jet Propulsion Laboratory, Pasadena, CA |
| Start date | 2021-07-27 |
| End date | 2025-10-21 |
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This is early/mid-stage (TRL 5) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.
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