Fault Tolerant Computing based on a Reconfigurable Hardware/Software Architecture

Computers that operate in space are exposed to a harsh radiation environment that causes material degradation and intermittent crashes. Current solutions to this problem include “hardening” a computer by altering the underlying semiconductor material and using non-standard circuit designs. These approaches make these rad-hard computers expensive and with performance that lags commercial computers by ~20 years. There is currently a demand from the aerospace industry for new computers that can match commercial performance while achieving the reliability needed in a space environment at a price that is not cost-prohibitive for the wide-scale adoption. This project builds on over 10 years of NASA-funded research at Montana State University on a computer architecture called RadPC. RadPC implements a comprehensive set of fault mitigation strategies on a commercial Field Programmable Gate Array (FPGA). Various sub-systems of RadPC have been demonstrated on high-altitude balloons (8x), on sounding rockets (2x), on the International Space Station, and on two small satellite missions. RadPC has also been selected for a lunar surface demonstration through the Artemis program. Through this past research, the architecture of RadPC has been refined into one that achieves the performance, reliability, and flexibility to support future space missions. However, the current prototype form of RadPC requires manual construction of the system at each step of the design process. This manual and tedious construction of the current RadPC system makes it difficult for RadPC to be adopted as a commercial product. The aim of this SBIR project is to investigate the automation of the development process for RadPC so that a developer can write programs for the RadPC architecture without being burdened with the underlying fault mitigation procedures that are being implemented.

Replace ~20 year old rad-hard processors with a lower-cost, higher performance, commercial-based technology. Execute computationally-intensive algorithms such as real-time science data processing, autonomy, and navigation. Provide control & data handling for NASA small satellites.

Provide small satellites computing with increased reliability and performance, but at a price-point below current rad-hard computers. Implement Earth image processing (climate monitoring, disaster mitigation, agriculture). Enable communication networks.

This is early/mid-stage (TRL 5) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.

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