High Temperature UV near field Imager

Program Objective GE Research, in collaboration with NASA Glenn Research Center (NASA Glenn) and Ohio Aerospace Institute (OAI), proposed to design, fabricate, and test silicon carbide (SiC) electronic components to demonstrate feasibility of an ultraviolet (UV) near-field image camera operating in high-temperature environments up to 500°C for imaging geological samples on the surface of Venus. The SiC imager is sensitive to UV light from a powered source and will use either reflected light or fluorescence from surface geological formations. The target operating environment is 500°C for 60 days with a target image resolution of 1 mm per pixel at 0.5 m distance. Prior Work For more than 20 years, GE Research has developed and supplied SiC photodiodes (PDs) in the flame tracker sensor product for GE's gas turbines. GE Research's commercial PD operates at ~300°C. GE Research has also fabricated SiC PD arrays for gamma photon counting for downhole applications. Pixel sizes of 100x100 m and array size of 32x32=1024 pixels per die have been previously fabricated. Both standard PD and avalanche PD operating in Geiger mode have been tested and reported. GE Research has demonstrated packaging methods for 750°C operation for hypersonic application. NASA Glenn has fabricated and demonstrated SiC JFET-based amplifiers, analog to digital converters, and other relevant integrated circuits (ICs) for the Long Lived In-Situ Solar System Explorer (LLISSE) platform with which the proposed UV imager will be designed to interface. NASA's SiC JFET IC technology has been shown to be durable at 500°C for 60 days under Venus surface conditions. OAI has domain knowledge and prior experience working on Venus lander scene cameras and can provide relevant input to the use cases, requirements, and scientific value of a high-temperature capable UV imager. Technical Challenges SiC PD operating at 300°C is at TRL9 (commercial product). SiC PD array is at TRL5. SiC PD array operating at 500°C for 60 days is at TRL2. The proposed PD array requires individually addressable PDs, which necessitates more complex interconnect and routing than the already-demonstrated gamma detector. The multidisciplinary team proposes to design and build multiple size arrays from up to 32x32 pixels per die, with scalable architecture such that multiple dies can be used to build larger arrays. The proposed project will move the SiC PD array to TRL5 by changing fabrication materials, modifying device structure, and testing to demonstrate utility and durability. Packaging challenges include finding a solution to avoid leakage paths between the PD and front-end amplifier. The team will evaluate direct pad-to-pad wirebonding between SiC chips in addition to testing selected high purity ceramic substrate materials with high bulk resistivity at 500°C. This type of packaging approach has not been demonstrated for the Venus environment, therefore, the proposed innovation will advance the packaging technology from TRL2 to TRL5. GE Research will leverage prior work with gold thick film printing and sintering for circuit board assembly and wiring. Integration of the PD array with control and amplifying SiC circuitry involves capturing system requirements and architecture and co-designing each piece. The team will take the current TRL2 concept to having prototype hardware submitted to test in NASA Glenn's Extreme Environment Rig (GEER) chamber by the end of the 3-year project to TRL5. Commercialization SiC imager, integrated circuits, and high-temperature packaging technologies all have relevant use cases in power generation and aerospace industries, including gas turbines, nuclear power, and hypersonic flight. Technology development and maturation in these areas will benefit other fields. GE Research has a proven record of bringing SiC electronics from concept to production.

Developing Instrument or spacecraft technology to improve measurements for future planetary science missions

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