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Completed TRL 4 (started at 1, targeting 4)
The objective of this project will be to evaluate the benefits of the Versal Adaptive Compute Acceleration Platform (ACAP) architecture and to investigate the new Microchip RT PolarFire flash-based FPGA to address future performance and reliability challenges and advancements in sensor technology with stringent SWaP-C (Size, Weight, Power, and Cost) constraints for space computing on the edge. Due to the promising characteristics the Versal ACAP provides, a future single-board computer with the Versal ACAP device, called the VErsal Space PRocessor (VESPR), can address performance challenges for demanding applications such as those found in AI and communications.
SpaceCube VESPR will be a next-generation addition to the SpaceCube family featuring the Xilinx Versal ACAP device and conforming to the CubeSat Card Specification (CS2), a preliminary architecture-design feasibility analysis is an anticipated end result for this project. The goal of the SpaceCube program is to provide substantial improvements in onboard computing capability while lowering relative power consumption and cost compared to traditional radiation-hardened single-board computers. The addition of the SpaceCube VESPR will further this goal by exponentially enhancing the capabilities of these devices for communication, navigation, and AI applications.
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