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Completed TRL 3 (started at 2, targeting 3)
This project lays the groundwork for the future development of a spacecraft on a chip implementation (SCOC), which would combine the electronics for multiple spacecraft functions onto a single device, or as few devices as practical.
System on a chip is a method to increase engineering efficiency. State of the art components are increasing in gate count as expected according to Moore's law. In the past, a single engineer could write all of the code that would be placed into a smaller programmable component. As component density has increased, it now typically takes several engineers to develop a single chip. In the near future, design modularity and design reuse will be required to maintain engineering efficiency. System on a chip allows NASA to develop or buy a library of functions which can be stitched together using a common interconnect bus. This promotes code reuse and greatly increases the speed at which a large, complex design can be developed. The direct benefits are efficiency and remaining competitive. This design methodology paves the way for the final goal of developing a complete spacecraft on a chip. The goal of this project is to lay the key groundwork for being able to build a complete spacecraft on a chip.
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Listed on TechPort itself — the most direct way to ask about this specific project.
This is early/mid-stage (TRL 3) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.
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