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Completed TRL 4 (started at 3, targeting 4)
Design a Field Programmable Gate Array (FPGA) based data acquisition system that is able to provide housekeeping data, that takes advantage of the FPGA capabilities for the development of a versatile system that will be able to communicate using the Ethernet interface for easy implementation and communication with any flight computer.
This work will benefit Wallops Flight Facility (WFF) by providing the Sounding Rocket Program Office (SRPO) and the Balloon Program Office (BPO) a housekeeping card that is easier to implement, faster and has a lower cost than what is currently being utilized on Sounding rocket and Balloon missions.
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