SiC Mosfet with Radiation-Resistant Gate Oxide Performance to 600V

Single-event burnout (SEB) and gate ruptureoccur when high-energy ions strike SiC MOSFET devices in the OFF state. Heavy ion radiation caused irreversible damage (possibly owing to SEGR) at biases below 10% and catastrophic failure at biases below 40% of their nominal blocking voltage in commercial SiC power devices. Commercial SiC MOSFETs degrade forlatent gate leakage even at 50V drain-to-source voltage (VDS). Heavy ion collisions produce high-concentration electron-hole pairs that cause gate damage. In an n-channel MOSFET, electric field produced by the positive drain bias causes the generated holes and electrons to flow in opposite directions. The gate oxide interface accumulates and leaks holes toward the source contact. When the oxides electric field surpasses a threshold, it breaks down. SCDevice has designed a SiC MOSFET device with a P+ shield layer that prevents SEB by maintaining temperatures well below the sublimation point of SiC (2973K) and by diverting the holes away from the gate oxide. Remarkably, our simulations show that 600V SEB performance can be achieved with only a P+ shield layer. Simulations reveal that when subjected to an ion strike with a LET of 40 MeV-cm2/mg, our devices biased at VDS=600V show temperature rise under 750K and electric field of less than 4.0MV/cm in the gate oxide. Our findings demonstrate more than sixfold increase in the device bias before gate degradation may occur, potentially enabling the use of SiC MOSFET in space applications. We intend to manufacture and market SiC MOSFET for space applications. Our innovation can be applied to Si MOSFET devices to enhance the radiation performance. During phase-II, SCDevice will design and fabricate the MOSFET, radiation test, use the data to calibrate simulation models, re-design and fabricate lot-2 and complete radiation testing to verify performance. During technology development and validation, SCDevice will identify and address customer needs and pain points. Using the TCAD simulation tool, SCDevice has created a SiC MOSFET device with (a) Single event burnout performance up to drain-to-source voltage, Vds=1200V and (b) low gate oxide electric field (< 6MV/cm) for heavy ion radiation with linear transfer energy up to 40 MeV-cm2/mg. Our devices employ a P+ shield layer in the path of the heavy ion, which effectively acts as a low resistive path to bleed off holes in the electron-hole plasma formed by the ion strike and thereby reduces electric field buildup at the gate oxide. For identical simulation conditions, our modeling of a commercial device reveals that the device failed for SEB even at Vds=600V and electric field in the gate oxide is over 18MV/cm. This study marks an improvement of more than fourfold in the device bias before gate damage might occur, which could enable the use of SiC MOSFETs in space applications. SCDevice's device innovation can be applied to Si MOSFET devices to further enhance their radiation performance in comparison to commercially available devices.   Fabricate SiC MOSFET devices and demonstrate the following radiation performance: Breakdown Voltage, BVDSS @ 25 °C: 1000V - 3000 V Threshold Voltage, Vth @25 °C: 2V to 6V Specific ON Resistance  < 10.0 mΩ-cm2 Maximum bias yielding no degradation: No change in PIGS or BVDSS pre-vs. post-irradiation: ≥ 600V Onset bias for current degradation: lowest bias yielding measurable change in gate (IG) or drain (ID) current during run: ≥ 600V Threshold bias for sudden SEE: catastrophic failure (ΔID> 20 mA and BVDSS< 1 V (shorted), or ΔIG> 1 mA) immediately upon beam exposure: ≥ 600V Maximum E-field in Gate Oxide @ VDS=600V (Using TCAD): < 2MV/cm Temperature rating (TMAX): -50°C to 150°C Gate Oxide BV distribution-Before and after radiation exposure: < 25% difference   Deliverables to NASA at the end of Phase-II: Deliver 10 units of MOSFET that meet the target performance Detailed radiation performance report Full electrical characterization report Customer interaction and feedback report Phase-III plan

 Use of SiC devices allows increasing the power supply voltage on satellites, hence increase power for higher throughput, broader coverage and faster orbital positioning.  SiC devices would reduce the satellite’s volume and weight, a real asset given the high price per kilo launch. The result is either: smaller and lighter satellites for a given mission, or a higher performance payload for a given satellite. SiC devices’ vulnerability to radiation damage hinders its usage in space. NASA space mission could directly benefit from our SiC MOSFET.  Power management represents 40% of the rad-hard electronics market. Radiation-resistant high-voltage SiC components will benefit the cost-competitive satellite sector. Lighter satellites should lower rocket launch greenhouse gas emissions like carbon dioxide and nitrous oxide.

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