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Adaptive Neuromorphic Processors for Cognitive Communications

Completed TRL 4 (started at 4, targeting 7)

Description

The objective of this work is to develop highly Size, Weight, and Power (SWaP) efficient neuromorphic processors that can train deep learning algorithms. The training phase for deep learning is very compute and data intensive. Being able to train a network on the satellite eliminates the need to send large volumes of data to earth for training a new network. However, this requires an extremely energy efficient deep learning training processor. We will develop resistive crossbar neuromorphic processors, with the primary target being to train deep learning algorithms. We will look at multiple type of networks, including for cognitive communication applications, anomaly detection, and imaging. We will also look at processing networks for other data sets. The key outcomes of the work will be the processor design, processor performance metrics on various applications, prototype system, and software for the processor. Ability to adapt autonomously in space is often critical Neuromorphic processors that can train based on new are needed for cognitive communications, science experiment, fault tolerance, and sensor processing. Memristor analog neuromorphic processors could be over 1000x more energy efficient than GPUs for training (our calculations show higher efficiencies). However, memristors are not generally commercially available, and there are no analog neuromorphic processors commercially available. We will utilize currently available CMOS technology instead of memristors to get build analog neuromorphic training processors. Our processor will be radiation hardened. There are currently not radiation hardened deep learning processor for training or inference. This will give almost the same energy and speed efficiency. We estimate that using 10nm technology we will be able to get 59 TOPS/W for training with good training accuracy results. This work will use currently available CMOS technology instead of memristors to build mixed signal rad hard CNN training processors. The key objectives are: Develop highly SWAP efficient, rad hard, deep learning processor for training CNNs. Use a collection of plain resistors instead of memristors to build resistive crossbar circuits Design neuromorphic processors based on the resistive crossbar circuits, targeting training of CNNs Optimize design for NASA applications of interest, including cognitive communications, anomaly detection, and science experiments. Test processor's radiation tolerance Achieve state of the art throughputs to allow easy commercialization. Deliverables: Low SWAP chip with for training. Design and performance estimation of resistive neuromorphic processor. Board and processor for launch on TES CubeSat.

Benefits

Potential NASA applications include various deep learning training and inference tasks on satellites. These include cognitive communications, processing sensor outputs, and scientific experiments. Additionally, the developed system could be used for UAVs. The non-NASA market would be primarily for edge processing, where power is highly limited. The market includes both the DoD and the commercial market. DoD applications include cognitive communications, sensor processing, cognitive decision making, and federated learning. Commercial applications include communications systems, automobiles, consumer electronics, and robots.

Details

Technology areaFlight Computing and Avionics
ProgramSmall Business Innovation Research/Small Business Tech Transfer (SBIR/STTR)
Lead organizationGlenn Research Center, Cleveland, OH
Start date2023-07-20
End date2025-12-31

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