Real-Time Hardware Configurable Coprocessors

This project will prototype a coprocessor companion for radiation-hardened computers that can boost system performance by exploiting the parallel resources and reconfigurability of commercial Field Programmable Gate Arrays (FPGA). The prototype builds upon a feasibility study that investigated using dynamically reconfigurable coprocessing circuitry integrated into a proven fault-tolerant architecture known as RadPC. The RadPC architecture has been matured through NASA-funded flight demonstrations at Montana State University culminating with a lunar mission in 2024. RadPC was licensed to Resilient Computing in 2021 to bring it to market as a viable aerospace solution. Through prior NASA SBIR funding, RadPC has been adapted and matured into a form that uses the emerging RISC-V CPU, implements fault-recovery procedures abstracted from the developer, and supports inclusion of coprocessors within the fault-tolerant architecture. In this project, we will prototype a coprocessor system that can be dynamically configured using the partial reconfiguration (PR) capability of modern FPGAs. This approach enables more efficient use of FPGA resources by implementing signal processing algorithms as a sequence of tasks accomplished with different processing blocks that are swapped in and out while holding the interim results in the fast storage registers of the coprocessor. By swapping the processing blocks using PR, the hardware resources needed on the FPGA is reduced because not all the steps of the algorithm are implemented simultaneously. This leads to faster computation by reducing delays on the FPGA and less power consumption due to using less circuitry at any given time. The proposed prototype will perform object detection on incoming camera data using a sequence of coprocessor steps that are dynamically swappable including filtering, edge detection, and pattern recognition.The prototype will undergo fault-injection testing and two rounds of radiation testing. Harsh radiation environment of space: Material degradation & intermittent faults. Current “rad-hard” computers: Expensive & lag performance of commercial computers by ~25 years. Cost-prohibitive for most small spacecraft missions. Our RadPC + coprocessor advantages: Implements a patented fault-tolerant architecture on a commercial FPGA called "RadPC". Advances high-performance space computing by enabling novel processing architectures through coprocessor modules. Coprocessor hardware can be re-configured in real-time for efficient use of FPGA resources. RadPC’s fault-tolerant approach tested on numerous NASA flights: High-altitude balloons (8x) & sounding rockets (2x). International Space Station (3x) & small satellites (2x). Upcoming lunar demonstration through NASA CLPS program (2024). Objectives TO-1: Develop coprocessor modules to accelerate object detection in real-time image data. TO-2: Integrate the object detection coprocessors into RadPC's fault-tolerant computer system. TO-3: Develop a camera-to-display testbed to functionally test the coprocessor engine.  TO-4: Perform fault injection testing of the prototype under representative fault rates. TO-5: Perform radiation testing on the prototype. Deliverables A prototype of the reconfigurable coprocessor system performing object detection on real-time camera data. Test reports on the prototype’s performance, accuracy in identifying objects, fault tolerance, and radiation immunity.

Accelerating computationally intense algorithms such as real-time science data processing, autonomy, and navigation using coprocessors. Boosting performance of rad-hard processors with higher performance, commercial-based companion technology. Small satellites needing increased performance, but at a price-point below current rad-hard computers. Earth image processing (climate monitoring, disaster mitigation, agriculture). Communication networks.

This is early/mid-stage (TRL 4) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.

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