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Radiation-Hardened Wide-Temperature Mixed-Signal Library in a 22nm FDSOI CMOS Process
Completed
TRL 3 (started at 3, targeting 5)
Description
Alphacore proposes to design and characterize a radiation-hardened analog library that includes total ionizing dose (TID) of 300krad(Si), immunity to single event latchup and functional interrupt (SEL and SEFI), and low single event upset (SEU) rate. Alphacores proposed analog library includes three key components to any mixed-signal SoC, or ASIC: a phase locked loop (PLL), an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC). The 3-item analog library is not the only deliverable in this program, Alphacore will also develop a set of design guidelines for the 22FDX process space mission IC designers can use to achieve both radiation-hard and highly reliable low-temperature capable systems. The guidelines will include biasing (VDD, back bias) and layout rules which mitigate deleterious effects, such as hot carrier degradation and TID. These models can be used in most common design flows. Radiation testing of the DAC is also underway to establish that these designs clearly meet the hardness requirements of the target missions. During Phase II, Alphacore will not only support CMOS IP development for the most harsh NASA mission environments, but also cover critical immediate needs in other areas such as the High-Performance Spaceflight Computing (HPSC) Chiplet, a radiation-hardened multi-core processor. NASA also will be developing single board computer based on this chiplet. These components are supposed to bring NASA (and DoD) two orders of magnitude improvement in their space computing capabilities. Analog and mixed-signal circuit blocks have long been critical for NASA’s missions and collaboration missions. While several research groups have been pursuing solutions for electronics in harsh environments, to Alphacore’s knowledge, no group has developed an Analog/Mixed-Signal Library solution designed and tested for combination of extreme temperatures and space radiation, aimed for design of radiation-hardened electronics. Alphacore has extensive experience in developing radiation-hardened, high-reliability mixed-signal ICs in 22nm – 90nm FDSOI processes for space, defense and high energy physics customers. The gained experience can be leveraged in this program. Lower geometry FDSOI is one of the world’s most advanced CMOS processes and arguably the best process for high-speed analog CMOS design, with special back gate biasing that enables calibration of radiation effects in mixed-signal circuits. Technical objectives: • Reliability evaluation of 22FDX process • Complete ADC TID tests and all DAC tests • Optimize and send to fabrication Analog Library test chip • Evaluate Analog Library test chip Deliverables: • Kickoff meeting within 30 days of contract start • Progress reports as stated in the contract • Technical reviews as stated in the contract • Final report including detailed simulation and test results • Completed “Guidelines for Radiation-hard and Reliable ICs” document • Five Analog Library test chips, packaged and placed on test boards delivered to NASA
Benefits
Alphacore’s radiation-hard analog library can help NASA design lightweight spacecrafts for future deep space missions. The low-mass will also keep costs low, and can accommodate multiple deep space missions. Future NASA missions that could benefit from components designed using Alphacore’s rad-hard library include Europa Clipper and the Titan Saturn System Mission, along with the Moon-to-Mars program and the Origins Space Telescope The technological advancements needed to maintain leadership in defense capabilities will require significant innovation in space components, and with the growing presence of the DoD in space (e.g., Space Force, hypersonic missile defense), Alphacore’s solution will be in high demand. It will also benefit low-temperature applications such as infrared cameras and quantum computing
Details
| Technology area | Flight Computing and Avionics |
| Program | Small Business Innovation Research/Small Business Tech Transfer (SBIR/STTR) |
| Lead organization | Jet Propulsion Laboratory, Pasadena, CA |
| Start date | 2024-07-27 |
| End date | 2026-07-26 |
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