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Low Power Reconfigurable FPGA Transponder

Completed

Description

This task will develop a prototype flight transponder based on low power FPGAs capable of implementing existing Electra, CoNNECT, UST, and Iris waveforms.

Under this initiative, a prototype Ka-Band exciter and receiver are under development; suitable FPGAs that are lower power than the Virtex 5 but still compatible with a deep space environment are being surveyed with a goal of a lower power Iris V2 implementation; and a trade study is being conducted to determine under what conditions a CPU is needed and what software would run on it.

Benefits

Increased science return

Increased competitiveness and data return for smallsats

Increased data return for smallsats

Details

Technology areaFlight Computing and Avionics > Avionics Component Technologies > High-Performance Field-Programmable Gate Arrays
ProgramCenter Independent Research & Development: JPL IRAD (JPL IRAD)
Lead organizationJet Propulsion Laboratory, Pasadena, CA
Start date2013-10-01
End date2017-10-01

Project contacts

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How to get involved

This is a mature technology (TRL 7+) — the realistic path in is usually NASA's Technology Transfer Program: licensing an existing NASA patent, or a Space Act Agreement to use NASA facilities/expertise directly. NASA also runs a startup licensing program with no upfront fee for companies formed to commercialize a specific NASA technology.

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