Time Sensitive Network Embedded Technology (TNET)

This initiative centers on the development and deployment of a High-Performance Space Computing (HPSC) system based on the Microchip PIC64 integrated within a modern time sensitive Ethernet network framework. While the PIC64 HPSC offers a substantial advancement in computational capabilities for space missions, enabling applications and scientific objectives previously unattainable with existing solutions, it is essential to recognize that HPSC is one element within a larger architectural context. This project aims to deliver foundational reference architectures that missions can utilize, addressing a broad array of architectural requirements and mission objectives. By providing these pre-designed architectures, missions can concentrate on their specific goals rather than the underlying system design.The project will create multiple HPSC system architectures tailored to the needs of emerging space and industrial applications. These architectures will address specific architectural drivers, including distributed and centralized systems, high fault tolerance, sensor aggregation, real-time processing, and legacy interface requirements. This approach will provide NASA with direct experience and critical knowledge of how to effectively apply the HPSC Time-Sensitive Networking (TSN) Ethernet infrastructure and its ecosystem to complex challenges, without reliance on any single industry partner's architecture. This effort will also serve as a catalyst for NASA to cultivate relationships with industry and academia, fostering an independent ecosystem for future developments that benefit NASA. The TSN Ethernet architectures developed in this project will be shared with industry, and collaborations will be pursued to drive use case solutions that align with NASA’s strategic plans.This initiative includes developing prototypes, demonstrating functionality, and benchmarking the architectures both in absolute terms and against existing products. This will provide NASA and industry with static and dynamic metrics derived from active HPSC-based systems. Prototyping will leverage industry solutions at the subsystem level while maintaining NASA’s ownership of the overall architectures. Special emphasis will be placed on applications requiring high fault tolerance, exploring architectures for Size, Weight, and Power (SWAP)-optimized fault tolerance solutions. Cybersecurity will be addressed within the proposed architectures, recognizing its growing importance for space-based assets. The architectural choices will examine the overlap between fault tolerance, security, and testability to identify areas of commonality and efficiency in the architectural decisions.

​The development and deployment of the HPSC system offer significant advancements for space missions and industrial applications. By utilizing the Microchip PIC64 within a modern TSN Ethernet network, the system provides enhanced computational capabilities that were previously unattainable. This advancement enables more complex applications and scientific objectives, expanding the scope and depth of space exploration and industrial automation. The project's focus on creating foundational reference architectures allows missions to concentrate on their specific goals, reducing the time and resources needed for underlying system design.Furthermore, the development of multiple HPSC system architectures tailored to specific needs, such as distributed and centralized systems, high fault tolerance, sensor aggregation, real-time processing, and legacy interface requirements, ensures versatility and adaptability. This approach provides NASA with direct experience and knowledge of applying the HPSC TSN Ethernet infrastructure, fostering independence from single industry partners. The collaboration with industry and academia promotes an independent ecosystem for future developments, benefiting NASA and the broader community. Prototyping, benchmarking, and demonstrating functionality will provide valuable metrics and insights, validating the system's performance. Addressing cybersecurity and fault tolerance within the architectures enhances the reliability and security of space-based assets, ensuring mission success and data integrity.​

This is early/mid-stage (TRL 1) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.

None of these are guaranteed paths for this specific project — TechPort itself doesn't have an "apply" button. Reaching out to the contact(s) above with a specific question is usually the fastest way to find out what's actually open.