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HPSC Integration and SOSA Testbed for Avionics Readiness (HISTAR)
Active
TRL 3 (started at 3, targeting 5)
Description
This task develops and delivers the HPSC System Test Kit, a modular development platform aligned with the SOSA Space Segment (S3C) standard. The Test Kit provides NASA, other government users, and the broader aerospace industry with a consistent and practical environment for evaluating the HPSC processor, integrating early software, and studying system behavior expected in future avionics. It assembles a SOSA compliant chassis, HPSC based Single Board Computers from qualified vendors, supporting cards such as storage and power modules, an I/O interface card, and a management subsystem. Together, these elements create a representative lab system that developers can use well before flight ready hardware becomes available. The technology fills a clear gap within the current HPSC timeline. While the processor and associated software continue through qualification, missions and commercial developers still need a way to examine multicore performance, mixed criticality configurations, time sensitive networking, and integration workflows. The Test Kit provides that bridge by offering a stable platform for running operating systems such as Linux and commercial real time systems, along with flight software frameworks like cFS and F Prime. It supports early bring up, functional testing, and evaluation of application behavior on the HPSC architecture. This reduces downstream risk for NASA programs and gives industry partners a meaningful way to align their own products and designs with HPSC capabilities. The Test Kit also supports national goals around modular open systems and standards based avionics. By aligning with SOSA S3C, the system promotes cross vendor interoperability and helps cultivate a sustainable industry ecosystem built around open architectures. It enables collaboration across NASA, commercial developers, academic groups, and standards bodies by providing a shared reference system for testing, research, and technology maturation. The result is a reusable and mission relevant platform that strengthens the path from HPSC development to real operational use across both government and industry.
Benefits
The HPSC System Test Kit provides a direct and practical benefit by giving NASA, other government programs, and the aerospace industry a reliable way to work with the HPSC processor early in the development cycle. Instead of waiting for flight qualified hardware, developers can use the Test Kit to bring up operating systems, validate mixed criticality behaviors, test flight software frameworks, and study multicore performance in a controlled environment. This reduces integration risk, shortens development schedules, and helps programs make informed architectural decisions. The Test Kit also supports broader adoption of open standards within the avionics community. Its alignment with SOSA S3C encourages industry partners to build interoperable products and promotes consistency across vendors. By providing a shared platform for research, training, and prototyping, the Test Kit strengthens collaboration across NASA centers, commercial companies, and academic groups. The result is a more mature and sustainable ecosystem that improves readiness for missions planning to use HPSC based computing solutions.
Details
| Technology area | Flight Computing and Avionics > Avionics Systems and Subsystems > Spacecraft Command and Data Handling Systems |
| Program | Game Changing Development (GCD) |
| Lead organization | Jet Propulsion Laboratory, Pasadena, CA |
| Start date | 2025-07-01 |
| End date | 2027-09-30 |
Project contacts
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How to get involved
This is early/mid-stage (TRL 3) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.
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