Software Redundancy Framework for COTS SoC FPGAs

Redundancy is a powerful technique for achieving high levels of Single Event Upset (SEU) tolerance when utilizing commercial technology. While the multiple CPU cores boost performance by operating in parallel, they also can operate redundantly in order to maximize tolerance to SEUs. This approach requires a software framework to configure and operate the redundant system. In this proposed effort, Innoflight will develop a Software Redundancy Framework (SRF) for Commercial Off-The-Shelf (COTS) Multi-core System-on-Chip (SoC) Field Programmable Gate Arrays (FPGAs). The SRF is an IP core on an FPGA and associated software modules offering an elegant suite of targeted mitigations for SEUs, thus enabling COTS hardware to bring its superior SWaP to demanding radiation environments for the first time. We will examine the SRF: (a) initially with single-threaded user applications; (b) then with multithreaded applications; (c) testing with prototype hardware including under proton single event effects (SEE) testing; and (d) finally a potential flight demonstration on the ICE-Cap mission slated for launch in 2015. At the end of Phase II, Innoflight will have a complete framework that is ready for implementation on operational space computing platforms

SRF enables the application of high-performance processors, when embedded in COTS FPGAs, in NASA missions that traditionally demanded radiation hard by design (RHBD) processors with their associated performance, power and cost. A lower-cost compact flight computer, based on a multi-core SoC FPGA, and utilizing SRF provides Size, Weight and Power (SWaP) benefits, especially for deep space missions needing moderate radiation tolerance. These applications span the entire range of space missions from Deep Space all the way down to LEO environments where operational reliability requirements demand improved SEU tolerance. There are currently a significant number of missions contemplating GTO, MEO and HEO orbits with small spacecraft for scientific, military and commercial applications that could benefit from the SRF.

Commercial ventures in deep space for asteroid mining and other potentially lucrative opportunities are highly motivated to leverage COTS electronics in their spacecraft designs and will be equally interested as NASA in SRF for enabling COTS FPGA utilization. Commercial satellite communications (SATCOM) spacecraft traditionally use pedigree electronics but with the recent interest in constellations of hundreds of communication satellite in 5+ year LEO missions they will be interested in technologies that enable the COTS for SWaP-C benefits. With ongoing Congressional budget pressures and interests in disaggregated and fractionated architectures the DoD and Intelligence Community will find interest and potential application of SRF to enable COTS FPGAs for longer LEO, GEO and possibly MEO missions as well.

This is early/mid-stage (TRL 4) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.

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