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Multi-Mission MicroSDR, Phase I
Completed
Description
Toyon proposes to develop a low-power and compact reconfigurable radio specifically targeted to NASA mission needs. We envision the radio to be well matched to small satellites, terrestrial ground links, and autonomous vehicles. The design is based on the latest in field programmable gate array (FPGA) and general purpose processors (GPP). Typical software defined radios (SDRs) rely heavily on digital signal processors (DSPs) due to their ease of software development and ability to multitask well. Our emphasis will be on performing all baseband processing inside the FPGA due to its ability to offer over an order of magnitude increase in computational efficiency. While this approach does significantly decrease power consumption and associated platform size, it requires special considerations, particularly in terms of software development. As such, we will leverage Toyon's ongoing experience in computationally efficient waveform and associated software development using the latest in FPGA behavioral design tools. In addition, the architecture will stress logic component reuse between multiple waveforms to support rapid reconfiguration as well as reduce development time. Our RF front-end design will be a direct-conversion architecture to reduce size and provide frequency agility. The use of open-standards interfaces will provide for rapid systems integration.
Benefits
With a desire to reconfigure and reuse wireless equipment, there is tremendous interest in SDR for the military, emergency response, and consumer applications. At the same time, numerous factors have limited its penetration into these markets. With the military's ability to combine a large number of radios into a single package, JTRS does have potential; this is particularly true for its use in larger platforms that are not constrained in size and power. However, integrating SDR technology into smaller equipment, that is cost and power constrained, will require the use of more computationally efficient processing and considerations on overall architecture. The proposed concept is specifically targeted to these requirements by leveraging FPGA processing and direct-conversion RF translation. At the same time, our goal will be to exploit logic and processing reuse in order to allow rapid reconfiguration for the support of multiple waveforms.
Details
| Technology area | Flight Computing and Avionics > Avionics Component Technologies > High-Performance Field-Programmable Gate Arrays |
| Program | Small Business Innovation Research/Small Business Tech Transfer (SBIR/STTR) |
| Lead organization | Glenn Research Center, Cleveland, OH |
| Start date | 2007-01-19 |
| End date | 2007-07-23 |
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How to get involved
This is a mature technology (TRL 7+) — the realistic path in is usually NASA's Technology Transfer Program: licensing an existing NASA patent, or a Space Act Agreement to use NASA facilities/expertise directly. NASA also runs a startup licensing program with no upfront fee for companies formed to commercialize a specific NASA technology.
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