Fast Low Power ADC with Integrated Digital Data Processor, Phase I

Innovative data measurement/acquisition systems are needed to support future Earth System Science measurements of the Earth's atmosphere and surface. An adequate system must employ a high-speed, extra low power, linear, analog-to-digital converter (ADC) with high input bandwidth and accuracy, followed by a digital signal processor that is usually implemented inside a field-programmable gate array (FPGA). Commercially available ADCs with input bandwidths larger than 1GHz feature high power consumption and latency, and poor linearity. With increasing ADC sampling rates, timing difficulties within the parallel interconnects between the ADC and the following FPGA become increasingly prominent. Therefore, a monolithic ADC incorporating a data converter that performs digital data demultiplexation and retiming is desired. To address these needs, the Advanced Science and Novel Technology Company proposes to develop a novel, extra low-power, extremely linear, under-sampling ADC featuring a high analog input bandwidth (>5GHz) that can easily interface to a following FPGA through a low-speed (<750Mb/s) parallel interface. To achieve this functionality, the proposed system-on-chip will utilize a proprietary sub-Nyquist front-end analog demultiplexer, a combinational ADC structure with proprietary gain-stabilization circuitry, and a digital signal processor implementing digital data demultiplexation and the company's proprietary data alignment scheme.

This is a mature technology (TRL 7+) — the realistic path in is usually NASA's Technology Transfer Program: licensing an existing NASA patent, or a Space Act Agreement to use NASA facilities/expertise directly. NASA also runs a startup licensing program with no upfront fee for companies formed to commercialize a specific NASA technology.

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