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Radiation-Tolerant Reprogrammable FPGA for Digital Signal Processing Circuits, Phase I
Completed
TRL 3 (started at 1, targeting 3)
Description
Field Programmable Gate Arrays are a widely used technology; however, they are generally limited in reprogrammability. Radiation hard, low power and high density ReProgramable FPGAs (RP-FPGAs) would be a tremendous asset in long duration missions. The ability to adapt to changeing mission profiles and on board capabilities is highly desirable. We herein propose to develop a RP-FPGA for flight use. In Phase I we will prove basic device concepts working with a leading FPGA manufacturer. In Phase II we will develop a viable demonstration prototype that will enable routine Phase III device manufacture.
Benefits
Potential NASA Commercial Applications: FPGAs serve a wide range of applications as an alternative to ASICs. Highly desirable is a FPGA that could be reprogrammed. Product revisions are often constrained by past programmed logic or suffer from extra cost as programmed arrays must be replaced. A reprogrammable gate array would be a significant benefit to product designers and enable a new form of product upgrade to be easily carried out - hence offering opportunity to gain a significant market share.
Details
| Technology area | Flight Computing and Avionics > Avionics Component Technologies > High-Performance Field-Programmable Gate Arrays |
| Program | Small Business Innovation Research/Small Business Tech Transfer (SBIR/STTR) |
| Lead organization | Langley Research Center, Hampton, VA |
| Start date | 2008-01-25 |
| End date | 2008-07-24 |
Project contacts
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How to get involved
This is early/mid-stage (TRL 3) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.
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