← Back to NASA Technology Projects
Low-power Cross-Correlator ASIC
Completed
TRL 3 (started at 1, targeting 3)
Description
Pacific MicroCHIP Corp. offers to design an ASIC that includes a cross-correlation unit together with the interfaces to be connected to the output of the GeoSTAR's receivers, multiplexer and output interface for the GeoSTAR's system-level integration. The proposed novel ASIC required by NASA's PATH mission will have a greatly reduced power consumption compared to a FPGA based or a classic ASIC based implementations, increased radiation hardness and extended operating temperature range. The proposed cross-correlation unit consists of cross-correlation cells which are based on novel architecture. The logic primitives are arranged to "work when must" rather than to "work when need" in these novel cross-correlation cells. The high speed interfaces the proposed ASIC will incorporate can minimize the power consumption and increase the reliability. Termination resistors, amplifiers, analog-to-digital-converters realized inside the ASIC will save power due to shorter interconnects compared to interconnects that are used in FPGAs. Moreover, the high-speed receivers-deserializers could further save the power due to reduced number of termination resistors compared to the high-speed interface with analog-to-digital converters. The deep submicron SOI CMOS technology selected for the ASIC's fabrication will increase its tolerance to total ionizing dose (TID) and reduce the probability of radiation induced latch-up. The ASIC will be designed following the design for testability (DFT) methods that will simplify characterization and testing of the fabricated ASIC thus will reduce the risk and lower the cost of the product. Phase I of the project will provide a complete definition of the proposed ASIC, its design and in silico validation of critical circuits. Phase II will produce a fieldable product ready for commercialization in Phase III.
Benefits
The main application for the proposed Low-power Cross-Correlator ASIC is to process the GeoSTAR instrument's microwave sounder signals. The proposed ASIC will cross-correlate the signals of 2X125 receivers located on two arms of the Y shaped antenna. A total of three ASICs will be employed to implement the complete cross-correlation function required for the instrument. Novel cross-correlator's architecture will permit to process these signals at greatly reduced power consumption compared to FPGAs or specialized cross-correlator ASICs. The proposed cross-correlator ASIC can also find application in signal processing required for radio telescopes such as the SKA that may employ more than 2000 receivers. The cross-correlators installed on such telescopes are projected to consume tens of kilowatts of power. The ASIC proposed by us offers the reduction of power consumption by at least an order. The proposed ASIC's core will be available as an IP ready for implementation in other correlator ASICs employed in space born and Earth based NASA's instruments.
High energy efficiency at high data processing speed, radiation hardness and wide operating temperature range of the proposed Cross-Correlator ASIC makes it applicable in many space based commercial and military systems such as radiometry, interferometry, polarimetry and spectrometry employed for remote sensing applications. Cross correlators are also required for neural implants in medicine, for image sensor signal processing in military and homeland security and for synthetic aperture radars in both military and civil aviation. The proposed ASIC can be included into the signal processing path of artificial eyes, ears or other senses that are employing signal processing based on artificial neural networks. In order to ensure the highest outcome of the developed technology, the proposed ASIC's core will also be offered as an IP block which will be licensed to interested parties for variety of applications that require fast and high energy efficient parallel signal processing.
Details
| Technology area | Flight Computing and Avionics > Avionics Component Technologies > Radiation-Hardened ASIC Technologies |
| Program | Small Business Innovation Research/Small Business Tech Transfer (SBIR/STTR) |
| Lead organization | Pacific Microchip Corporation, Culver City, CA |
| Start date | 2012-02-13 |
| End date | 2012-08-13 |
Project contacts
Listed on TechPort itself — the most direct way to ask about this specific project.
How to get involved
This is early/mid-stage (TRL 3) — the most realistic path in is NASA SBIR/STTR, which funds small businesses and research institutions to develop technology aligned with NASA's needs (equity-free, phased funding). Check whether a current SBIR/STTR solicitation topic overlaps with this project's technology area, or contact the project directly (above) to ask.
None of these are guaranteed paths for this specific project — TechPort itself doesn't have an "apply" button. Reaching out to the contact(s) above with a specific question is usually the fastest way to find out what's actually open.